; ARM Processor Register Defines
; Pawel Pytlak
; February 1, 2007

INT_RAM_BASE_BR	equ		0x00300000
INT_RAM_BASE_AR	equ		0x00000000

; EBI Chip-select Registers
EBI_BASE		EQU		0xFFE00000
EBI_CSR0		EQU		0x00
EBI_CSR1		EQU		0x04
EBI_CSR2		EQU		0x08
EBI_CSR3		EQU		0x0C
EBI_CSR4		EQU		0x10
EBI_CSR5		EQU		0x14
EBI_CSR6		EQU		0x18
EBI_CSR7		EQU		0x1C
EBI_RCR			EQU		0x20
EBI_MCR			EQU		0x24

; EBI Chip-selecr Register Configuration Bits
EBI_DBW_16		EQU		(0x01 << 0)

EBI_NWS_1 		EQU		(0x00 << 2)
EBI_NWS_2 		EQU		(0x01 << 2)
EBI_NWS_3 		EQU		(0x02 << 2)
EBI_NWS_4 		EQU		(0x03 << 2)
EBI_NWS_5 		EQU		(0x04 << 2)
EBI_NWS_6 		EQU		(0x05 << 2)
EBI_NWS_7 		EQU		(0x06 << 2)
EBI_NWS_8 		EQU		(0x07 << 2)

EBI_WSE			EQU		(0x01 << 5)

EBI_PAGES_1M	EQU		(0x00 << 7)
EBI_PAGES_4M	EQU		(0x01 << 7)
EBI_PAGES_16M	EQU		(0x02 << 7)
EBI_PAGES_64M	EQU		(0x03 << 7)

EBI_TDF_0		EQU		(0x00 << 9)
EBI_TDF_1		EQU		(0x01 << 9)
EBI_TDF_2		EQU		(0x02 << 9)
EBI_TDF_3		EQU		(0x03 << 9)
EBI_TDF_4		EQU		(0x04 << 9)
EBI_TDF_5		EQU		(0x05 << 9)
EBI_TDF_6		EQU		(0x06 << 9)
EBI_TDF_7		EQU		(0x07 << 9)

EBI_BAT_BYTE_WR	EQU		(0x00 << 12)
EBI_BAT_BYTE_SL	EQU		(0x01 << 12)

EBI_CSEN		EQU		(0x01 << 13)

EBI_BA_OFFSET	EQU		(20)

; EBI Remap Control Register Configuration BIts
EBI_RCB			EQU		0x00
EBI_RCB			EQU		0x01

; EBI Memory Control Register
EBI_DRP_STD		EQU		(0x00 << 4)
EBI_DRP_EARLY	EQU		(0x01 << 4)

; APMC User Interface
APMC_BASE		EQU		0xFFFF4000
APMC_SCER		EQU		0x00
APMC_SCDR		EQU		0x04
APMC_SCSR		EQU		0x08
APMC_PCER		EQU		0x10
APMC_PCDR		EQU		0x14
APMC_PCSR		EQU		0x18
APMC_CGMR		EQU		0x20
APMC_PCR		EQU		0x28
APMC_PMR		EQU		0x2C
APMC_SR			EQU		0x30
APMC_IER		EQU		0x34
APMC_IDR		EQU		0x38
APMC_IMR		EQU		0x3C

; APMC Configuration Bits
APMC_CLK_CPU	EQU		0b0000000000000000001
APMC_CLK_US0	EQU		0b0000000000000000100
APMC_CLK_US1	EQU		0b0000000000000001000
APMC_CLK_US2	EQU		0b0000000000000010000
APMC_CLK_SPI	EQU		0b0000000000000100000
APMC_CLK_TC0	EQU		0b0000000000001000000
APMC_CLK_TC1	EQU		0b0000000000010000000
APMC_CLK_TC2	EQU		0b0000000000100000000
APMC_CLK_TC3	EQU		0b0000000001000000000
APMC_CLK_TC4	EQU		0b0000000010000000000
APMC_CLK_TC5	EQU		0b0000000100000000000
APMC_CLK_PIOA	EQU		0b0000010000000000000
APMC_CLK_PIOB	EQU		0b0000100000000000000
APMC_CLK_ADC0	EQU		0b0001000000000000000
APMC_CLK_ADC1	EQU		0b0010000000000000000
APMC_CLK_DAC0	EQU		0b0100000000000000000
APMC_CLK_DAC1	EQU		0b1000000000000000000

APMC_MOSC_BYP	EQU		0x01
APMC_MOSC_EN	EQU		0x02
APMC_MCKO_DIS	EQU		0x04

APMC_PRES_NONE	EQU		(0b000 << 4)
APMC_PRES_DIV2	EQU		(0b001 << 4)
APMC_PRES_DIV4	EQU		(0b010 << 4)
APMC_PRES_DIV8	EQU		(0b011 << 4)
APMC_PRES_DIV16	EQU		(0b100 << 4)
APMC_PRES_DIV32	EQU		(0b101 << 4)
APMC_PRES_DIV64	EQU		(0b110 << 4)

APMC_MUL_OFFSET 		EQU	8
APMC_OSCOUNT_OFFSET		EQU	16
APMC_PLLCOUNT_OFFSET	EQU	24

APMC_CSS_LF		EQU		(0b00 << 14)
APMC_CSS_MOSC	EQU		(0b01 << 14)
APMC_CSS_PLL	EQU		(0b10 << 14)

APMC_SHDALC		EQU		0b01
APMC_WKACKC		EQU		0b10

APMC_SHDALS_OUT_TRIS	equ	0b00
APMC_SHDALS_OUT_LEVEL0	equ	0b01
APMC_SHDALS_OUT_LEVEL1	equ	0b10

APMC_WKACKS_OUT_TRIS	equ	0b0000
APMC_WKACKS_OUT_LEVEL_0	equ	0b0100
APMC_WKACKS_OUT_LEVEL_1	equ	0b1000

APMC_WKEN		EQU		0b010000
APMC_ALSHEN		EQU		0b100000

APMC_WKEDG_NONE			EQU	(0b00 << 6)
APMC_WKEDG_POS_EDG		EQU	(0b01 << 6)
APMC_WKEDG_NEG_EDG		EQU	(0b10 << 6)
APMC_WKEDG_BOTH_EDG		EQU	(0b11 << 6)

APMC_MOSCS		EQU		0b01
APMC_PLL_LOCK	EQU		0b10




; cpu operation modes
ARM_MODE_USER	EQU		0b10000
ARM_MODE_FIQ	EQU		0b10001
ARM_MODE_IRQ	EQU		0b10010
ARM_MODE_SVC 	EQU		0b10011
ARM_MODE_ABORT	EQU		0b10111
ARM_MODE_UNDEF	EQU		0b11011
ARM_MODE_SYS	EQU		0b11111

T_BIT			equ		0b00100000
F_BIT			equ		0b01000000
I_BIT			equ		0b10000000

; interrupt stack size definitions
IRQ_STACK_SIZE 	EQU		(3*8*4)
FIQ_STACK_SIZE 	EQU		(3*4)
ABT_STACK_SIZE 	EQU		(1*4)
UND_STACK_SIZE 	EQU		(1*4)

; Advanced Interrupt Controller
AIC_BASE		equ		0xFFFFF000

AIC_SMR0		equ		0x000
AIC_SMR1		equ		0x004
; TODO Add in the rest
AIC_SMR26		equ		0x068
AIC_SMR27		equ		0x06C
AIC_SMR28		equ		0x070
AIC_SMR29		equ		0x074
AIC_SMR30		equ		0x078
AIC_SMR31		equ 	0x07C

AIC_SVR0		equ 	0x080
AIC_SVR1		equ		0x084
; TODO Add in the rest
AIC_SVR26		equ		0x0E8
AIC_SVR27		equ		0x0EC
AIC_SVR28		equ		0x0F0
AIC_SVR29		equ		0x0F4
AIC_SVR30		equ		0x0F8
AIC_SVR31		equ		0x0FC

AIC_IVR			equ		0x100
AIC_FVR			equ		0x104

AIC_ISR			equ		0x108
AIC_IPR			equ		0x10C
AIC_IMR			equ		0x110
AIC_CISR		equ		0x114
AIC_IECR		equ		0x120
AIC_IDCR		equ		0x124
AIC_ICCR		equ		0x128
AIC_ISCR		equ		0x12C
AIC_EOICR		equ		0x130
AIC_SPU			equ		0x134

AIC_SRC_TYPE_EXT_POSITIVE equ 0b01100000
; TO DO add in all sources
AIC_SRC_FIQ		equ 	0x00000001
AIC_SRC_SWIRQ 	equ		0x00000002
AIC_SRC_US0IRQ	equ		0x00000004
; ...
AIC_SRC_IRQ3	equ 	0x04000000
; etc




; PIO User Interface
PIOA_BASE	equ	0xFFFEC000
PIOB_BASE	equ 0xFFFF0000

PIO_PER		equ 0x00
PIO_PDR		equ 0x04
PIO_PSR		equ 0x08
PIO_OER		equ 0x10
PIO_ODR		equ 0x14
PIO_OSR		equ 0x18
PIO_IFER	equ 0x20
PIO_IFDR	equ 0x24
PIO_IFSR	equ 0x28
PIO_SODR	equ 0x30
PIO_CODR	equ 0x34
PIO_ODSR	equ 0x38
PIO_PDSR	equ 0x3c
PIO_IER		equ 0x40
PIO_IDR		equ 0x44
PIO_IMR		equ 0x48
PIO_ISR		equ 0x4c
PIO_MDER	equ 0x50
PIO_MDDR	equ 0x54
PIO_MDSR	equ 0x58





PA0		equ	(1 << 0)
PA1		equ	(1 << 1)
PA2		equ	(1 << 2)
PA3		equ	(1 << 3)
PA4		equ	(1 << 4)
PA5		equ	(1 << 5)
PA6		equ	(1 << 6)
PA7		equ	(1 << 7)
PA8		equ	(1 << 8)
PA9		equ	(1 << 9)
PA10	equ	(1 << 10)
PA11	equ	(1 << 11)
PA12	equ	(1 << 12)
PA13	equ	(1 << 13)
PA14	equ	(1 << 14)
PA15	equ	(1 << 15)
PA16	equ	(1 << 16)
PA17	equ	(1 << 17)
PA18	equ	(1 << 18)
PA19	equ	(1 << 19)
PA20	equ	(1 << 20)
PA21	equ	(1 << 21)
PA22	equ	(1 << 22)
PA23	equ	(1 << 23)
PA24	equ	(1 << 24)
PA25	equ	(1 << 25)
PA26	equ	(1 << 26)
PA27	equ	(1 << 27)
PA28	equ	(1 << 28)
PA29	equ	(1 << 29)

PB0		equ	(1 << 0)
PB1		equ	(1 << 1)
PB2		equ	(1 << 2)
PB3		equ	(1 << 3)
PB4		equ	(1 << 4)
PB5		equ	(1 << 5)
PB6		equ	(1 << 6)
PB7		equ	(1 << 7)
PB8		equ	(1 << 8)
PB9		equ	(1 << 9)
PB10	equ	(1 << 10)
PB11	equ	(1 << 11)
PB12	equ	(1 << 12)
PB13	equ	(1 << 13)
PB14	equ	(1 << 14)
PB15	equ	(1 << 15)
PB16	equ	(1 << 16)
PB17	equ	(1 << 17)
PB18	equ	(1 << 18)
PB19	equ	(1 << 19)
PB20	equ	(1 << 20)
PB21	equ	(1 << 21)
PB22	equ	(1 << 22)
PB23	equ	(1 << 23)
PB24	equ	(1 << 24)
PB25	equ	(1 << 25)
PB26	equ	(1 << 26)
PB27	equ	(1 << 27)


LED1	EQU PB8
LED2	EQU	PB9
LED3	EQU	PB10
LED4	EQU	PB11
LED5	EQU	PB12
LED6	EQU	PB13
LED7	EQU	PB14
LED8	EQU	PB15	

LEDS	EQU	(LED1 | LED2 | LED3 | LED4 | LED5 | LED6 | LED7 | LED8)
